The present invention is directed to phase locked loop (PLL) circuits, and more particularly to a loop filter for a PLL circuit in a monolithic integrated circuit (IC).
A PLL circuit is typically used to reduce the phase difference between an input signal and an output from a voltage controlled oscillator (VCO). An input signal is provided to a phase detector and its phase is compared to the phase of a signal from the VCO. The phase difference (i.e., the phase error) is provided to a loop filter where it is converted to a voltage and filtered. The output of the filter is a control voltage that is provided to the VCO and used to align the VCO phase more closely to the phase of the input signal.
A common method of converting phase error to a control voltage includes charging an integrating capacitor with a current for a period of time proportional to the phase error. For example, and with reference to FIG. 1, a phase error .phi.e from a phase detector 10 may be provided to a charge pump 12 that generates the current, and thereafter to a loop filter 14 that performs the integration function and provides the control voltage to the VCO 16. The loop filter 14 typically consists of an operational amplifier 18 that has its input and output connected with a resistor 20 and capacitor 22 in series. The input of the operational amplifier 18 may be connected to the charge pump 12 through a resistor 24, and the output connected to the VCO 16.
The response time of the PLL circuit (time to "lock" the phase) is a function of the characteristics of the circuit components, including the resistor 20 and capacitor 22 in the loop filter. In PLL circuits in which the response time is to be particularly brief, on the order of several milliseconds, the resistor 20 has values in the range of 10 Kohms to 100 Kohms and the capacitor has values in the range of 0.01 .mu.F to 10 .mu.F. While individual (non-IC) components with these values are available for use in PLL circuits, the individual components are too large for many applications, such as where a monolithic IC PLL circuit is desired. However, components with these values are simply not presently manufacturable in monolithic ICs, and it is one of the objects of the present invention to provide a loop filter for a monolithic integrated PLL circuit that meets the response time heretofore achievable only from individual components.
One of the disadvantages of the use of single operational amplifier 18 in the loop filter 14 of the prior art is the lack of precise control of phase error due to the offset limitations of the operational amplifier 18. For example, and with reference to FIG. 1, the phase error at the phase detector output is given by, EQU .phi..sub.e =Voff(2.pi./Vref) (1)
If Vref is 0.5 V and Voff is 10 mV, the phase error would be 0.125 radians or 7.2 degrees. This result is unacceptable for systems in which accurate phase tracking is required, such as quadrature demodulators. It is desirable that the phase error be less than about two degrees.
It is also desirable to use a loop filter in a PLL circuit that replicates the behavior of the loop filter of FIG. 1 in order to maintain equivalent operation. Namely, EQU Vout=-I.sub.0 [(1/C22 s)+R20] (2)
where I.sub.0 =Vref/R24, C22 is the capacitance of capacitor 22 and R20 is the resistance of resistor 20.
One solution to these problems is to replace the resistors of FIG. 1 with switched-capacitor equivalents. However, this solution does not resolve the amplifier offset problem. Further, the amplifier 18 would periodically be placed in an entirely open loop configuration as the switches of the switched-capacitor equivalents toggled. Switched-capacitor networks require a capacitor between the output and the inverting input of all amplifiers in order to assure stable operation, and if such a capacitor were added to FIG. 1, the open loop response of the loop filter would not replicate the behavior of the loop filter in FIG. 1.
Accordingly, it is an object of the present invention to provide a novel PLL circuit that obviates the problems of the prior art.
It is another object of the present invention to provide a novel monolithic IC PLL circuit with a response time of several milliseconds.
It is yet another object of the present invention to provide a novel monolithic IC loop filter for a PLL circuit in which switched-capacitors replace the resistors in the filter.
It is still another object of the present invention to provide a novel monolithic IC loop filter for a PLL circuit that uses two operational amplifiers and switched-capacitors instead of resistors.
It is a further object of the present invention to provide a novel loop filter for a PLL circuit that provides precise phase error control.
These and many other objects and advantages of the present invention will be readily apparent to one skilled in the art to which the invention pertains from a perusal of the claims, the appended drawings, and the following detailed description of the preferred embodiments.